To provide insights about Digital IC Design, RTL Coding for Combinational and Sequential circuits and RTL to GDS II Design flow using Cadence tools. This program also provide to students hands-on experience with Cadence tools in order to simulate the development of cutting-edge technologies and methodologies for developing design excellence in the field of microelectronic system verification, design, and implementation.
Event Details | Dates |
---|---|
Important Dates | 05th - 11th Mar 2025 |
Time | 09:00 AM to 05:00 PM |
Target Audience | ECE Students |
Type of program | Offline |
Venue | VLSI Lab, ECE Department |
Note :
Designation : Associate Professor,
Department of ECE ,Acharya Institute of Technology
Designation : Assistant Professor, Department of ECE, Acharya Institute of Technology
Designation : Associate Professor,
Department of ECE ,Acharya Institute of Technology
Designation : Assistant Professor, Department of ECE, Acharya Institute of Technology
Designation : Assistant Professor, Department of ECE, Acharya Institute of Technology
Designation : Assistant Professor, Department of ECE, Acharya Institute of Technology
Designation : Assistant Professor, Department of ECE, Acharya Institute of Technology